5799 search results - page 567 / 1160 » Patterns Generate Architectures |
210
Voted
DAC
2006
ACM
16 years 1 months ago
2006
ACM
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...
189
Voted
IPPS
2003
IEEE
16 years 17 days ago
2003
IEEE
Percolation has recently been proposed as a key component of an advanced program execution model for future generation high-end machines featuring adaptive data/code transformatio...
184
Voted
DAC
1996
ACM
15 years 11 months ago
1996
ACM
: We presentdesign-for-low-power techniques based on glitch reduction for register-transfer level circuits. We analyze the generation and propagation of glitches in both the contro...
184
Voted
DAC
1995
ACM
15 years 11 months ago
1995
ACM
High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-speci c integrated circuits (ASICs) and application-...
200
Voted
ASPDAC
2005
ACM
15 years 9 months ago
2005
ACM
Abstract— This paper addresses high level synthesis for realtime digital signal processing (DSP) architectures using heterogeneous functional units (FUs). For such special purpos...