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209
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ICCAD
2006
IEEE
169views Hardware» more  ICCAD 2006»
16 years 4 months ago
Microarchitecture parameter selection to optimize system performance under process variation
Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...
Xiaoyao Liang, David Brooks
186
Voted
DDECS
2009
IEEE
171views Hardware» more  DDECS 2009»
16 years 2 months ago
Packet header analysis and field extraction for multigigabit networks
—Packet header analysis and extraction of header fields needs to be performed in all network devices. As network speed is increasing quickly, high speed packet header processing...
Petr Kobierský, Jan Korenek, Libor Polcak
176
Voted
CA
1997
IEEE
15 years 11 months ago
Layered Modular Action Control for Communicative Humanoids
Face-to-face interaction between people is generally effortless and effective. We exchange glances, take turns speaking and make facial and manual gestures to achieve the goals of ...
Kristinn R. Thórisson
206
Voted
SIGGRAPH
1990
ACM
15 years 11 months ago
The accumulation buffer: hardware support for high-quality rendering
Paul Haeberli and Kurt Akeley SiliconGraphicsComputerSystems This paper describes a system architecture that supports realtime generation of complex images, efficient generation o...
Paul Haeberli, Kurt Akeley
232
Voted
CASES
2007
ACM
15 years 11 months ago
Application driven embedded system design: a face recognition case study
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
Karthik Ramani, Al Davis