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ISCAS
2007
IEEE
128views Hardware» more  ISCAS 2007»
16 years 1 months ago
SAT-based ATPG for Path Delay Faults in Sequential Circuits
Due to the development of high speed circuits beyond the 2-GHz mark, the significance of automatic test pattern generation for Path Delay Faults (PDFs) drastically increased in t...
Stephan Eggersglüß, Görschwin Fey,...
FPL
2004
Springer
94views Hardware» more  FPL 2004»
16 years 2 days ago
Evaluating Fault Emulation on FPGA
Abstract. We present an evaluation of accelerating fault simulation by hardware emulation on FPGA. Fault simulation is an important subtask in test pattern generation and it is fre...
Peeter Ellervee, Jaan Raik, Valentin Tihhomirov, K...
AIIDE
2007
15 years 9 months ago
Motivational Ambient and Latent Behaviors in Computer RPGs
Character behaviors in computer role-playing games have a significant impact on game-play, but are often difficult for game authors to implement and adapt. We present a behavior m...
Maria Cutumisu, Duane Szafron, Jonathan Schaeffer,...
NIPS
2000
15 years 8 months ago
Vicinal Risk Minimization
The Vicinal Risk Minimization principle establishes a bridge between generative models and methods derived from the Structural Risk Minimization Principle such as Support Vector M...
Olivier Chapelle, Jason Weston, Léon Bottou...
BC
2006
82views more  BC 2006»
15 years 6 months ago
Experiments and models of sensorimotor interactions during locomotion
During locomotion sensory information from cutaneous and muscle receptors is continuously integrated with the locomotor central pattern generator (CPG) to generate an appropriate m...
Alain Frigon, Serge Rossignol