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ICCD
2008
IEEE
420views Hardware» more  ICCD 2008»
16 years 3 months ago
Frequency and voltage planning for multi-core processors under thermal constraints
— Clock frequency and transistor density increases have resulted in elevated chip temperatures. In order to meet temperature constraints while still exploiting the performance op...
Michael Kadin, Sherief Reda
CASES
2006
ACM
16 years 10 days ago
Adapting compilation techniques to enhance the packing of instructions into registers
The architectural design of embedded systems is becoming increasingly idiosyncratic to meet varying constraints regarding energy consumption, code size, and execution time. Tradit...
Stephen Hines, David B. Whalley, Gary S. Tyson
ISCA
2010
IEEE
219views Hardware» more  ISCA 2010»
15 years 11 months ago
Using hardware vulnerability factors to enhance AVF analysis
Fault tolerance is now a primary design constraint for all major microprocessors. One step in determining a processor’s compliance to its failure rate target is measuring the Ar...
Vilas Sridharan, David R. Kaeli
SEC
2003
15 years 7 months ago
Providing Voice Privacy Over Public Switched Telephone Networks
: The public telephone network has been evolving from manually switched wires carrying analog encoded voice of the 19th century to an automatically switched grid of copper-wired, f...
Mohamed Sharif, Duminda Wijesekera
HPCA
2009
IEEE
16 years 7 months ago
A first-order fine-grained multithreaded throughput model
Analytical modeling is an alternative to detailed performance simulation with the potential to shorten the development cycle and provide additional insights. This paper proposes a...
Xi E. Chen, Tor M. Aamodt