The bus that connects processors to memory is known to be a major architectural bottleneck in SMPs. However, both software and scheduling policies for these systems generally focu...
Christos D. Antonopoulos, Dimitrios S. Nikolopoulo...
In this paper, we overview general hardware architecture and a programming model of SRC-6ETM reconfigurable computers, and compare the performance of the SRC-6E machine vs. IntelĀ...
Osman Devrim Fidanci, Daniel S. Poznanovic, Kris G...
We describe a new collaborative technology that is mid-way between the informality of email and the formality of shared workspaces. Email and other ad hoc collaboration systems ar...
We present SETS, an architecture for eļ¬cient search in peer-to-peer networks, building upon ideas drawn from machine learning and social network theory. The key idea is to arran...
We describe an object-oriented software integration frameccom, abstracted from our ļ¬ve years of experience in developing a complex, integrated code for rocket simulation. Roccom...
Xiangmin Jiao, Michael T. Campbell, Michael T. Hea...