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DAC
2002
ACM
16 years 7 months ago
HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery
This paper proposes a general hierarchical analysis methodology, HiPRIME, to efficiently analyze RLKC power delivery systems. After partitioning the circuits into blocks, we devel...
Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Ch...
DATE
2009
IEEE
111views Hardware» more  DATE 2009»
16 years 27 days ago
Enabling concurrent clock and power gating in an industrial design flow
— Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way th...
Leticia Maria Veiras Bolzani, Andrea Calimera, Alb...
WISER
2004
ACM
15 years 11 months ago
Hardware/software co-design for power system test development
Many hardware/software co-design models have been proposed [7, 2, 5, 6] that attempt to address problems in the hardware/software interface, in partitioning the system between har...
Austin Armbruster, Matt Ryan, Xiaoqing Frank Liu, ...
VLSID
2002
IEEE
142views VLSI» more  VLSID 2002»
16 years 6 months ago
Architecture and Design of a High Performance SRAM for SOC Design
Critical issues in designing a high speed, low power static RAM in deep submicron technologies are described along with the design techniques used to overcome them. With appropria...
Shobha Singh, Shamsi Azmi, Nutan Aarawal, Penaka P...
ESTIMEDIA
2005
Springer
15 years 11 months ago
A Perception-Aware Low-Power Software Audio Decoder for Portable Devices
We propose a new software audio decoder for processors supporting multiple discrete voltage-frequency operating points. The proposed decoding scheme allows the user to switch betw...
Samarjit Chakraborty, Ye Wang, Wendong Huang