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ICDCS
2006
IEEE
16 years 26 days ago
Elastic Routing Table with Provable Performance for Congestion Control in DHT Networks
Distributed hash table (DHT) networks based on consistent hashing functions have an inherent load balancing problem. The problem becomes more severe due to the heterogeneity of ne...
Haiying Shen, Cheng-Zhong Xu
LPNMR
2009
Springer
16 years 1 months ago
Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs
Configurable on chip multiprocessor systems combine advantages of task-level parallelism and the flexibility of field-programmable devices to customize architectures for paralle...
Harold Ishebabi, Philipp Mahr, Christophe Bobda, M...
GLVLSI
2007
IEEE
141views VLSI» more  GLVLSI 2007»
16 years 1 months ago
Transition-activity aware design of reduction-stages for parallel multipliers
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Osc...
SPAA
2005
ACM
16 years 11 days ago
Randomization does not reduce the average delay in parallel packet switches
Switching cells in parallel is a common approach to build switches with very high external line rate and a large number of ports. A prime example is the parallel packet switch (in...
Hagit Attiya, David Hay
GECCO
2006
Springer
143views Optimization» more  GECCO 2006»
15 years 10 months ago
A hybridized genetic parallel programming based logic circuit synthesizer
Genetic Parallel Programming (GPP) is a novel Genetic Programming paradigm. Based on the GPP paradigm and a local search operator - FlowMap, a logic circuit synthesizing system in...
Wai Shing Lau, Kin-Hong Lee, Kwong-Sak Leung