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ISORC
2009
IEEE
16 years 1 months ago
From Requirements to Code Revisited
In his article entitled "From Play-In Scenarios to Code: An Achievable Dream", David Harel presented a development schema that makes it possible to go from high-level us...
Tewfik Ziadi, Xavier Blanc, Amine Raji
EUROPAR
2003
Springer
15 years 11 months ago
Obtaining Hardware Performance Metrics for the BlueGene/L Supercomputer
Hardware performance monitoring is the basis of modern performance analysis tools for application optimization. We are interested in providing such performance analysis tools for t...
Pedro Mindlin, José R. Brunheroto, Luiz De ...
ISPDC
2010
IEEE
15 years 5 months ago
Resource-Aware Compiler Prefetching for Many-Cores
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
George C. Caragea, Alexandros Tzannes, Fuat Keceli...
EGC
2005
Springer
16 years 2 days ago
A Grid Architecture for Comfortable Robot Control
This paper describes a research project about robot control across a computing Grid, first step toward a Grid solution for generic process control. A computational Grid can signi...
Stéphane Vialle, Amelia De Vivo, Fabrice Sa...
ICS
1995
Tsinghua U.
15 years 10 months ago
A Data Cache with Multiple Caching Strategies Tuned to Different Types of Locality
Current data cache organizations fail to deliver high performance in scalar processors for many vector applications. There are two main reasons for this loss of performance: the u...
Antonio González, Carlos Aliagas, Mateo Val...