7456 search results - page 1070 / 1492 » Parallelism in Logic Programming |
166
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IPPS
2006
IEEE
16 years 26 days ago
2006
IEEE
Reconfigurable computing applications have traditionally had the exclusive use of the field programmable gate array, primarily because the logic densities of the available devices...
177
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IPPS
2006
IEEE
16 years 26 days ago
2006
IEEE
The development of Field Programmable Gate Arrays (FPGAs) had tremendous improvements in the last few years. They were extended from simple logic circuits to complex Systems-on-Ch...
212
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IPPS
2006
IEEE
16 years 26 days ago
2006
IEEE
Advanced wireless sensor network algorithms pose challenges to their formal modeling and analysis, such as modeling probabilistic and real-time behaviors and novel forms of commun...
182
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IPPS
2006
IEEE
16 years 26 days ago
2006
IEEE
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
185
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ICPP
2005
IEEE
16 years 13 days ago
2005
IEEE
Structured P2P overlay networks based on a consistent hashing function have an aftermath load balance problem that needs to be dealt with. A load balancing method should take into...