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3DPVT
2006
IEEE
229views Visualization» more  3DPVT 2006»
15 years 10 months ago
Fast and Efficient Dense Variational Stereo on GPU
Thanks to their high performance and programmability, the latest graphics cards can now be used for scientific purpose. They are indeed very efficient parallel Single Instruction ...
Julien Mairal, Renaud Keriven, Alexandre Chariot
DEXAW
2004
IEEE
132views Database» more  DEXAW 2004»
15 years 10 months ago
Using Data-Flow Analysis for Resilience and Result Checking in Peer-To-Peer Computations
To achieve correct execution of peer-to-peer applications on non-reliable resources, we present a portable and distributed algorithm that provides fault tolerance and result checki...
Samir Jafar, Sébastien Varrette, Jean-Louis...
ENC
2004
IEEE
15 years 10 months ago
Comparison of Scheduling Heuristics for Grid Resource Broker
In this paper, we consider parallel tasks scheduling problems for hierarchical decentralized systems that consist of homogeneous computational resources such as clusters, PCs and ...
Sergey Zhuk, Andrey Chernykh, Arutyun Avetisyan, S...
FPGA
1995
ACM
116views FPGA» more  FPGA 1995»
15 years 10 months ago
Logic Partition Orderings for Multi-FPGA Systems
One of the critical issues for multi-FPGA systems is developing software tools for automatically mapping circuits. In this paper we consider one step in this process, partitioning...
Scott Hauck, Gaetano Borriello
HICSS
1995
IEEE
109views Biometrics» more  HICSS 1995»
15 years 10 months ago
The architecture of an optimistic CPU: the WarpEngine
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
John G. Cleary, Murray Pearson, Husam Kinawi
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