8125 search results - page 1154 / 1625 » Parallelism and evolutionary algorithms |
188
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ICASSP
2008
IEEE
16 years 1 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
154
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ICDCS
2008
IEEE
16 years 1 months ago
2008
IEEE
Declustering techniques reduce query response times through parallel I/O by distributing data among multiple devices. Recently, replication based approaches were proposed to furth...
177
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IPPS
2008
IEEE
16 years 1 months ago
2008
IEEE
High performance computing is critical for financial markets where analysts seek to accelerate complex optimizations such as pricing engines to maintain a competitive edge. In th...
162
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SASP
2008
IEEE
16 years 1 months ago
2008
IEEE
—In this paper we present a method for construction of application specific processor cores from a given C code. Our approach consists of three phases. We start by quantifying t...
185
Voted
IEEEPACT
2007
IEEE
16 years 1 months ago
2007
IEEE
Loop nest optimization is a combinatorial problem. Due to the growing complexity of modern architectures, it involves two increasingly difficult tasks: (1) analyzing the profita...