770 search results - page 46 / 154 » Parallel simulation of chip-multiprocessor architectures |
164
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INFOCOM
2003
IEEE
15 years 11 months ago
2003
IEEE
Abstract—Link bundling is a way to increase routing scalability whenever a pair of Label Switching Routers in MPLS are connected by multiple parallel links. However, link bundlin...
163
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ICPP
2000
IEEE
15 years 10 months ago
2000
IEEE
The Virtual Interface Architecture brings the benefits of low latency User-level Networking to a cluster environment. With an increasing number of communication channels created ...
146
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ISORC
2002
IEEE
15 years 11 months ago
2002
IEEE
ARTISST (ARTISST is a Real-Time System Simulation Tool) is a modular event-driven simulation framework for real-time systems. It is targeted towards the performance evaluation of ...
167
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GPC
2009
Springer
15 years 3 months ago
2009
Springer
In this paper, we propose an extension to the I/O device architecture, as recommended in the PCI-SIG IOV specification, for virtualizing network I/O devices. The aim is to enable ...
170
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IPPS
2007
IEEE
16 years 9 days ago
2007
IEEE
In this paper we present a software tool for the simulation of distributed real-time embedded systems. Our tool is based on the popular NS-2 package for simulating the networking ...