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HPCA
2009
IEEE
16 years 7 months ago
Design and implementation of software-managed caches for multicores with local memory
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
Sangmin Seo, Jaejin Lee, Zehra Sura
PLDI
2010
ACM
16 years 3 months ago
Pacer: Proportional Detection of Data Races
Data races indicate serious concurrency bugs such as order, atomicity, and sequential consistency violations. Races are difficult to find and fix, often manifesting only in deploy...
Michael D. Bond, Katherine E. Coons, Kathryn S. Mc...
PEPM
2009
ACM
16 years 3 months ago
Self-adjusting computation: (an overview)
Many applications need to respond to incremental modifications to data. Being incremental, such modification often require incremental modifications to the output, making it po...
Umut A. Acar
CISIS
2010
IEEE
16 years 1 months ago
Threaded Dynamic Memory Management in Many-Core Processors
—Current trends in desktop processor design have been toward many-core solutions with increased parallelism. As the number of supported threads grows in these processors, it may ...
Edward C. Herrmann, Philip A. Wilsey
ASPLOS
2010
ACM
16 years 1 months ago
Flexible architectural support for fine-grain scheduling
To make efficient use of CMPs with tens to hundreds of cores, it is often necessary to exploit fine-grain parallelism. However, managing tasks of a few thousand instructions is ...
Daniel Sanchez, Richard M. Yoo, Christos Kozyrakis