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ICS
1999
Tsinghua U.
15 years 11 months ago
Improving the performance of speculatively parallel applications on the Hydra CMP
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
Kunle Olukotun, Lance Hammond, Mark Willey
HPCA
1998
IEEE
15 years 11 months ago
The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization
As we look to the future, and the prospect of a billion transistors on a chip, it seems inevitable that microprocessors will exploit having multiple parallel threads. To achieve t...
J. Gregory Steffan, Todd C. Mowry
LCR
1998
Springer
137views System Software» more  LCR 1998»
15 years 11 months ago
Integrated Task and Data Parallel Support for Dynamic Applications
There is an emerging class of real-time interactive applications that require the dynamic integration of task and data parallelism. An example is the Smart Kiosk, a free-standing ...
James M. Rehg, Kathleen Knobe, Umakishore Ramachan...
ISCA
1992
IEEE
125views Hardware» more  ISCA 1992»
15 years 10 months ago
Limits of Control Flow on Parallelism
This paper discusses three techniques useful in relaxing the constraints imposed by control flow on parallelism: control dependence analysis, executing multiple flows of control s...
Monica S. Lam, Robert P. Wilson
EPIA
1999
Springer
15 years 11 months ago
YapOr: an Or-Parallel Prolog System Based on Environment Copying
YapOr is an or-parallel system that extends the Yap Prolog system to exploit implicit or-parallelism in Prolog programs. It is based on the environment copying model, as first imp...
Ricardo Rocha, Fernando M. A. Silva, Vítor ...