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IPPS
1994
IEEE
15 years 10 months ago
Parallel Evaluation of a Parallel Architecture by Means of Calibrated Emulation
A parallel transputer-based emulator has been developed to evaluate the DDM--ahighlyparallel virtual shared memory architecture. The emulator provides performance results of a har...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
LCPC
2005
Springer
16 years 1 days ago
Loop Selection for Thread-Level Speculation
Thread-level speculation (TLS) allows potentially dependent threads to speculatively execute in parallel, thus making it easier for the compiler to extract parallel threads. Howeve...
Shengyue Wang, Xiaoru Dai, Kiran Yellajyosula, Ant...
IPPS
1998
IEEE
15 years 10 months ago
VPPB - A Visualization and Performance Prediction Tool for Multithreaded Solaris Programs
Efficient performance tuning of parallel programs is often hard. In this paper we describe an approach that uses a uni-processor execution of a multithreaded program as reference ...
Magnus Broberg, Lars Lundberg, Håkan Grahn
IPPS
1998
IEEE
15 years 10 months ago
Trace-Driven Debugging of Message Passing Programs
In this paper we report on features added to a parallel debugger to simplify the debugging of message passing programs. These features include replay, setting consistent breakpoin...
Michael A. Frumkin, Robert Hood, Luis Lopez
COORDINATION
1997
Springer
15 years 10 months ago
Coordination Patterns for Parallel Computing
The aim of this paper is to promote the idea of developing reusable coordination patterns for parallel computing, i.e. customizable components from which parallel applications can ...
Bernd Freisleben, Thilo Kielmann