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EUROGRAPHICS
2010
Eurographics
16 years 2 months ago
Fast Ray Sorting and Breadth-First Packet Traversal for GPU Ray Tracing
We present a novel approach to ray tracing execution on commodity graphics hardware using CUDA. We decompose a standard ray tracing algorithm into several data-parallel stages tha...
Kirill Garanzha and Charles Loop
PDP
2009
IEEE
16 years 1 months ago
Phoenix: A Runtime Environment for High Performance Computing on Chip Multiprocessors
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
Avneesh Pant, Hassan Jafri, Volodymyr V. Kindraten...
IPPS
2007
IEEE
16 years 28 days ago
Tera-scalable Fourier Spectral Element Code for DNS of Channel Turbulent Flow at High Reynolds Number
Due to the extensive requirement of memory and speed for direct numerical simulation (DNS) of channel turbulence, people can only perform DNS at moderate Reynolds number before. W...
Jin Xu
ISLPED
2006
ACM
105views Hardware» more  ISLPED 2006»
16 years 18 days ago
Reducing power through compiler-directed barrier synchronization elimination
Interprocessor synchronization, while extremely important for ensuring execution correctness, can be very costly in terms of both power and performance overheads. Unfortunately, m...
Mahmut T. Kandemir, Seung Woo Son
ISCAS
2005
IEEE
133views Hardware» more  ISCAS 2005»
16 years 7 days ago
Multiobjective VLSI cell placement using distributed simulated evolution algorithm
— Simulated Evolution (SimE) is a sound stochastic approximation algorithm based on the principles of adaptation. If properly engineered it is possible for SimE to reach nearopti...
Sadiq M. Sait, Ali Mustafa Zaidi, Mustafa I. Ali