16159 search results - page 2849 / 3232 » Parallel computing with CUDA |
171
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IEEEPACT
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract—In order to harness the full compute power of manycore processors, future designs must focus on effective utilization of on-chip cache and bandwidth resources. In this p...
187
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IEEEPACT
2009
IEEE
16 years 1 months ago
2009
IEEE
—Bulk memory copying and initialization is one of the most ubiquitous operations performed in current computer systems by both user applications and Operating Systems. While many...
171
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IEEEPACT
2009
IEEE
16 years 1 months ago
2009
IEEE
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
202
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IEEEPACT
2009
IEEE
16 years 1 months ago
2009
IEEE
—Analytical models have been used to estimate optimal values for parameters such as tile sizes in the context of loop nests. However, important algorithms such as fast Fourier tr...
179
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GCB
2009
Springer
16 years 1 months ago
2009
Springer
Abstract: The analysis of RNA folding landscapes yields insights into the kinetic folding behavior not available from classical structure prediction methods. This is especially imp...