16159 search results - page 2834 / 3232 » Parallel computing with CUDA |
194
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HPCA
2003
IEEE
16 years 7 months ago
2003
IEEE
Originally developed to connect processors and memories in multicomputers, prior research and design of interconnection networks have focused largely on performance. As these netw...
179
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HPCA
2003
IEEE
16 years 7 months ago
2003
IEEE
Predicated Execution can be used to alleviate the costs associated with frequently mispredicted branches. This is accomplished by trading the cost of a mispredicted branch for exe...
159
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HPCA
2002
IEEE
16 years 7 months ago
2002
IEEE
This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy ...
175
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HPCA
2002
IEEE
16 years 7 months ago
2002
IEEE
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
172
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HPCA
2002
IEEE
16 years 7 months ago
2002
IEEE
This paper advocates that cache coherence protocols use a bandwidth adaptive approach to adjust to varied system configurations (e.g., number of processors) and workload behaviors...