16159 search results - page 2829 / 3232 » Parallel computing with CUDA |
156
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HPCA
2006
IEEE
16 years 7 months ago
2006
IEEE
Building processors with large instruction windows has been proposed as a mechanism for overcoming the memory wall, but finding a feasible and implementable design has been an elu...
168
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HPCA
2006
IEEE
16 years 7 months ago
2006
IEEE
This paper explores the multi-dimensional design space for chip multiprocessors, exploring the inter-related variables of core count, pipeline depth, superscalar width, L2 cache s...
158
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HPCA
2005
IEEE
16 years 7 months ago
2005
IEEE
The memory system's large and growing contribution to system performance motivates more aggressive approaches to improving its efficiency. We propose and analyze a memory hie...
149
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HPCA
2005
IEEE
16 years 7 months ago
2005
IEEE
Due to increasing power densities, both on-chip average and peak temperatures are fast becoming a serious bottleneck in processor design. This is due to the cost of removing the h...
167
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HPCA
2005
IEEE
16 years 7 months ago
2005
IEEE
The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Furthermore, its power density makes it a hot-spot requiring expensive cooling sy...