16159 search results - page 2807 / 3232 » Parallel computing with CUDA |
245
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HPCA
2011
IEEE
14 years 10 months ago
2011
IEEE
In current Chip-multiprocessors (CMPs), a significant portion of the die is consumed by the last-level cache. Until recently, the balance of cache and core space has been primari...
203
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HPCA
2011
IEEE
14 years 10 months ago
2011
IEEE
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
205
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PDP
2011
IEEE
14 years 10 months ago
2011
IEEE
Abstract—Continuously reducing transistor sizes and aggressive low power operating modes employed by modern architectures tend to increase transient error rates. Concurrently, mu...
184
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CORR
2011
Springer
14 years 10 months ago
2011
Springer
Abstract—Set intersection is the core in a variety of problems, e.g. frequent itemset mining and sparse boolean matrix multiplication. It is well-known that large speed gains can...
216
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DAIS
2011
14 years 10 months ago
2011
Gossip-based peer sampling protocols have been widely used as a building block for many large-scale distributed applications. However, Network Address Translation gateways (NATs) c...