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ICS
1998
Tsinghua U.
15 years 11 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
ICDCS
1997
IEEE
15 years 11 months ago
Evaluating CORBA Latency and Scalability Over High-Speed ATM Networks
Conventional implementations of CORBA communication middleware incur significant overhead when used for performance-sensitive applications over high-speed networks. As gigabit ne...
Douglas C. Schmidt, Aniruddha S. Gokhale
181
Voted
ICDCS
1997
IEEE
15 years 11 months ago
Connection Admission Control for Hard Real-Time Communication in ATM Networks
Connection Admission Control (CAC) is needed in ATM networks to provide Quality of Service (QoS) guarantees to real-time connections. This paper presents a CAC scheme based on a b...
Qin Zheng, Tetsuya Yokotani, Tatsuki Ichihashi, Ya...
ICPP
1997
IEEE
15 years 11 months ago
How Much Does Network Contention Affect Distributed Shared Memory Performance?
Most of recent research on distributed shared memory (DSM)systems have focused on either careful design of node controllersor cache coherenceprotocols. Whileevaluating these desig...
Donglai Dai, Dhabaleswar K. Panda
VECPAR
1998
Springer
15 years 11 months ago
Simulating Magnetised Plasma with the Versatile Advection Code
Abstract. Matter in the universe mainly consists of plasma. The dynamics of plasmas is controlled by magnetic fields. To simulate the evolution of magnetised plasma, we solve the e...
Rony Keppens, Gábor Tóth
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