16159 search results - page 2717 / 3232 » Parallel computing with CUDA |
184
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HPCA
2003
IEEE
16 years 7 months ago
2003
IEEE
Inherent within complex instruction set architectures such as x86 are inefficiencies that do not exist in a simpler ISAs. Modern x86 implementations decode instructions into one o...
193
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MOBIHOC
2008
ACM
16 years 6 months ago
2008
ACM
Broadcast scheduling is a fundamental problem in wireless ad hoc networks. The objective of a broadcast schedule is to deliver a message from a given source to all other nodes in ...
168
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PPOPP
2010
ACM
16 years 4 months ago
2010
ACM
Drawing inspiration from several previous projects, we present an ownership-record-free software transactional memory (STM) system that combines extremely low overhead with unusua...
209
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PPOPP
2010
ACM
16 years 4 months ago
2010
ACM
As concurrent programming becomes prevalent, software providers are investing in concurrency libraries to improve programmer productivity. Concurrency libraries improve productivi...
182
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PPOPP
2010
ACM
16 years 4 months ago
2010
ACM
Transactional Memory (TM) is considered as one of the most promising paradigms for developing concurrent applications. TM has been shown to scale well on multiple cores when the d...