Recent work has shown that multithreaded workloads running in execution-driven, full-system simulation environments cannot use instructions per cycle (IPC) as a valid performance ...
In this paper, we study the effects of manipulating the architected direction of conditional branches. Through the use of statistical sampling, we find that about 40% of all dyna...
Improving cache performance requires understanding cache behavior. However, measuring cache performance for one or two data input sets provides little insight into how cache behav...
We present an algorithmic analog-to-digital converter (ADC) architecture for large-scale parallel quantization of internally analog variables in externally digital array processor...
This paper presents our experiments for integrating OMG MIOP (Multicast Inter-ORB Protocol) specifications into a CORBA ORB. We proposed an integration model which allows the coex...
Alysson Neves Bessani, Joni da Silva Fraga, Lau Ch...