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IEEEPACT
2005
IEEE
16 years 1 days ago
Compiler Directed Early Register Release
This paper presents a novel compiler directed technique to reduce the register pressure and power of the register file by releasing registers early. The compiler identifies regi...
Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abe...
IEEEPACT
2005
IEEE
16 years 1 days ago
Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors
This paper proposes a new hardware technique for using one core of a CMP to prefetch data for a thread running on another core. Our approach simply executes a copy of all non-cont...
Ilya Ganusov, Martin Burtscher
IEEEPACT
2005
IEEE
16 years 1 days ago
A Simple Divide-and-Conquer Approach for Neural-Class Branch Prediction
The continual demand for greater performance and growing concerns about the power consumption in highperformance microprocessors make the branch predictor a critical component of ...
Gabriel H. Loh
IEEEPACT
2005
IEEE
16 years 1 days ago
Performance Analysis of System Overheads in TCP/IP Workloads
Current high-performance computer systems are unable to saturate the latest available high-bandwidth networks such as 10 Gigabit Ethernet. A key obstacle in achieving 10 gigabits ...
Nathan L. Binkert, Lisa R. Hsu, Ali G. Saidi, Rona...
IEEEPACT
2005
IEEE
16 years 1 days ago
Memory Coloring: A Compiler Approach for Scratchpad Memory Management
Scratchpad memory (SPM), a fast software-managed onchip SRAM, is now widely used in modern embedded processors. Compared to hardware-managed cache, it is more efficient in perfor...
Lian Li 0002, Lin Gao 0002, Jingling Xue
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