Sciweavers

1075 search results - page 135 / 215
» Parallel Programming with Transactional Memory
Sort
View
IPPS
1993
IEEE
15 years 10 months ago
"Unstable Threads" Kernel Interface for Minimizing the Overhead of Thread Switching
The performance of threads is limited primarily by the overhead of two kinds of switching: vertical switching (user/kernel domain switching) and horizontal switching (context swit...
Shigekazu Inohara, Kazuhiko Kato, Takashi Masuda
PDP
2005
IEEE
15 years 12 months ago
A Comparison Study of the HLRC-DU Protocol versus a HLRC Hardware Assisted Protocol
SVM systems are a cheaper and flexible way to implement the shared memory programming paradigm. Their huge flexibility is due to their software implementation; however, this is al...
Salvador Petit, Julio Sahuquillo, Ana Pont
ICA3PP
2007
Springer
15 years 8 months ago
The Thread Migration Mechanism of DSM-PEPE
In this paper we present the thread migration mechanism of DSM-PEPE, a multithreaded distributed shared memory system. DSM systems like DSM-PEPE provide a parallel environment to h...
Federico Meza, Cristian Ruz
VLDB
1995
ACM
179views Database» more  VLDB 1995»
15 years 9 months ago
The ClustRa Telecom Database: High Availability, High Throughput, and Real-Time Response
New telecommunication services and mobility networks have introduced databases in telecommunication networks. Compared with traditional use of databases, telecom databases must fu...
Svein-Olaf Hvasshovd, Øystein Torbjø...
SPAA
1997
ACM
15 years 9 months ago
Efficient Detection of Determinacy Races in Cilk Programs
A parallel multithreaded program that is ostensibly deterministic may nevertheless behave nondeterministically due to bugs in the code. These bugs are called determinacy races, an...
Mingdong Feng, Charles E. Leiserson