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ASPLOS
2006
ACM
16 years 24 days ago
Unbounded page-based transactional memory
Exploiting thread level parallelism is paramount in the multi-core era. Transactions enable programmers to expose such parallelism by greatly simplifying the multi-threaded progra...
Weihaw Chuang, Satish Narayanasamy, Ganesh Venkate...
CC
2009
Springer
149views System Software» more  CC 2009»
16 years 7 months ago
Exploiting Speculative TLP in Recursive Programs by Dynamic Thread Prediction
Speculative parallelisation represents a promising solution to speed up sequential programs that are hard to parallelise otherwise. Prior research has focused mainly on parallelisi...
Lin Gao 0002, Lian Li 0002, Jingling Xue, Tin-Fook...
ICS
2007
Tsinghua U.
16 years 29 days ago
Sensitivity analysis for automatic parallelization on multi-cores
Sensitivity Analysis (SA) is a novel compiler technique that complements, and integrates with, static automatic parallelization analysis for the cases when relevant program behavi...
Silvius Rus, Maikel Pennings, Lawrence Rauchwerger
WSC
2008
15 years 9 months ago
Discrete Rate Simulation using linear programming
Discrete Rate Simulation (DRS) is a modeling methodology that uses event based logic to simulate linear continuous processes and hybrid systems. These systems are concerned with t...
Cecile Damiron, Anthony Nastasi
RTAS
2010
IEEE
15 years 5 months ago
Physicalnet: A Generic Framework for Managing and Programming Across Pervasive Computing Networks
This paper describes the design and implementation of a pervasive computing framework, named Physicalnet. Essentially, Physicalnet is a generic paradigm for managing and programmi...
Pascal Vicaire, Zhiheng Xie, Enamul Hoque, John A....