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JSS
2010
136views more  JSS 2010»
15 years 1 months ago
Automated diagnosis of feature model configurations
Software product-lines (SPLs) are software architectures that can be readily reconfigured for different project requirements. A key part of an SPL is a model that captures the rul...
Jules White, David Benavides, Douglas C. Schmidt, ...
TCOS
2010
15 years 1 months ago
PET SNAKE: A Special Purpose Architecture to Implement an Algebraic Attack in Hardware
Abstract. In [24] Raddum and Semaev propose a technique to solve systems of polynomial equations over F2 as occurring in algebraic attacks on block ciphers. This approach is known ...
Willi Geiselmann, Kenneth Matheis, Rainer Steinwan...
ICALP
2009
Springer
16 years 6 months ago
LTL Path Checking Is Efficiently Parallelizable
We present an AC1 (logDCFL) algorithm for checking LTL formulas over finite paths, thus establishing that the problem can be efficiently parallelized. Our construction provides a f...
Lars Kuhtz, Bernd Finkbeiner
ICPP
2008
IEEE
16 years 23 days ago
Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...
Xin Fu, Wangyuan Zhang, Tao Li, José A. B. ...
ISCA
2006
IEEE
187views Hardware» more  ISCA 2006»
16 years 10 days ago
A Case for MLP-Aware Cache Replacement
Performance loss due to long-latency memory accesses can be reduced by servicing multiple memory accesses concurrently. The notion of generating and servicing long-latency cache m...
Moinuddin K. Qureshi, Daniel N. Lynch, Onur Mutlu,...