: This paper presents a new tightly coupled computation/communication design developed to support the unique operational requirements of sensor webs. A critical challenge of sensor...
David L. Andrews, Joe Evans, Venumadhav Mangipudi,...
This paper describes a hardware architecture for modular multiplication operation which is efficient for bit-lengths suitable for both commonly used types of Public Key Cryptogra...
The GigaNetIC project aims to develop high-speed components for networking applications based on massively parallel architectures. A central part of this project is the design, ev...
: In this paper the problem of educational resource management in a cooperative learning environment is discussed. A task model was elaborated to determine both functional and leve...
Abstract. In SMT processors several threads run simultaneously to increase available ILP, sharing but competing for resources. The instruction fetch policy plays a key role, determ...