5553 search results - page 695 / 1111 » Parallel Implementation of Sch |
183
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IPPS
2006
IEEE
16 years 27 days ago
2006
IEEE
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
176
Voted
IPPS
2006
IEEE
16 years 27 days ago
2006
IEEE
Due to shared cache contentions and interconnect delays, data prefetching is more critical in alleviating penalties from increasing memory latencies and demands on Chip-Multiproce...
165
Voted
IPPS
2006
IEEE
16 years 27 days ago
2006
IEEE
Among different wireless LAN technologies 802.11a has recently become popular due to its high throughput, large system capacity, and relatively long range. In this paper, we prop...
198
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IPPS
2006
IEEE
16 years 27 days ago
2006
IEEE
This paper introduces a software DSM that can extend its shared object space exceeding 4GB in a 32bit commodity cluster environment. This is achieved through the dynamic memory ma...
177
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SKG
2006
IEEE
16 years 26 days ago
2006
IEEE
Making a truly useful massively multi-agent system is difficult since the actions of the full ensemble of agents cannot be controlled by designing just one agent. It is critical ...