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ASIACRYPT
2001
Springer
15 years 11 months ago
A Compact Rijndael Hardware Architecture with S-Box Optimization
Compact and high-speed hardware architectures and logic optimization methods for the AES algorithm Rijndael are described. Encryption and decryption data paths are combined and all...
Akashi Satoh, Sumio Morioka, Kohji Takano, Seiji M...
COSPS
2001
Springer
15 years 11 months ago
Automatic Array Privatization
Abstract. Array privatization is one of the most e ective transformations for the exploitation of parallelism. In this paper, we present a technique for automatic array privatizati...
Peng Tu, David A. Padua
APCSAC
2000
IEEE
15 years 11 months ago
Cost/Performance Tradeoff of n-Select Square Root Implementations
Hardware square-root units require large numbers of gates even for iterative implementations. In this paper, we present four low-cost high-performance fullypipelined n-select impl...
Wanming Chu, Yamin Li
POPL
1998
ACM
15 years 11 months ago
Maximal Static Expansion
Memory expansions are classical means to extract parallelism from imperative programs. However, for dynamic control programs with general memory accesses, such transformations eit...
Denis Barthou, Albert Cohen, Jean-Francois Collard
ICDAR
1997
IEEE
15 years 11 months ago
Memory efficient skeletonization of utility maps
An algorithm is presented that allows to perform skeletonization of large maps with much lower memory requirements than with the straightforward approach. The maps are divided int...
Albert M. Vossepoel, Klamer Schutte, Carl F. P. De...
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