474 search results - page 89 / 95 » Parallel Data Flow Analysis for OpenMP Programs |
169
Voted
IEEEPACT
2002
IEEE
15 years 10 months ago
2002
IEEE
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
135
Voted
ICPP
1999
IEEE
15 years 10 months ago
1999
IEEE
Trace-level reuse is based on the observation that some traces (dynamic sequences of instructions) are frequently repeated during the execution of a program, and in many cases, th...
205
Voted
PPOPP
2006
ACM
15 years 11 months ago
2006
ACM
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
158
Voted
BMCBI
2008
15 years 6 months ago
2008
Background: The availability of complete genomic sequences for hundreds of organisms promises to make obtaining genome-wide estimates of substitution rates, selective constraints ...
145
Voted
ICMCS
2007
IEEE
16 years 4 days ago
2007
IEEE
This paper introduces the software framework MMER Lab which allows an effective assembly of modular signal processing systems optimized for memory efficiency and performance. Our...