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» Parallel Computing with FPGAs - Concepts and Applications
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IPPS
2002
IEEE
15 years 11 months ago
Efficient Pipelining of Nested Loops: Unroll-and-Squash
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
Darin Petkov, Randolph E. Harr, Saman P. Amarasing...
HPCC
2009
Springer
15 years 11 months ago
On the Performance of Commit-Time-Locking Based Software Transactional Memory
Compared with lock-based synchronization techniques, Software Transactional Memory (STM) can significantly improve the programmability of multithreaded applications. Existing res...
Zhengyu He, Bo Hong
HPCA
2000
IEEE
15 years 11 months ago
Improving the Throughput of Synchronization by Insertion of Delays
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...
Ravi Rajwar, Alain Kägi, James R. Goodman
SIGGRAPH
2000
ACM
15 years 11 months ago
Pomegranate: a fully scalable graphics architecture
Pomegranate is a parallel hardware architecture for polygon rendering that provides scalable input bandwidth, triangle rate, pixel rate, texture memory and display bandwidth while...
Matthew Eldridge, Homan Igehy, Pat Hanrahan
IPPS
1999
IEEE
15 years 11 months ago
PM-PVM: A Portable Multithreaded PVM
PM-PVM is a portable implementation of PVM designed to work on SMP architectures supporting multithreading. PM-PVM portability is achieved through the implementation of the PVM fu...
Claudio M. P. Santos, Júlio S. Aude