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» Parallel Computing with FPGAs - Concepts and Applications
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ASAP
2007
IEEE
169views Hardware» more  ASAP 2007»
16 years 1 months ago
Reduced Delay BCD Adder
Financial and commercial applications use decimal data and spend most of their time in decimal arithmetic. Software implementation of decimal arithmetic is typically at least 100 ...
A. A. Bayrakci, A. Akkas
ICA3PP
2005
Springer
16 years 12 days ago
Evaluation of Interconnection Network Performance Under Heavy Non-uniform Loads
Abstract. Many simulation-based performance studies of interconnection networks are carried out using synthetic workloads under the assumption of independent traffic sources. We sh...
Cruz Izu, José Miguel-Alonso, José A...
EGH
2003
Springer
16 years 3 days ago
Mesh mutation in programmable graphics hardware
We show how a future graphics processor unit (GPU), enhanced with random read and write to video memory, can represent, refine and adjust complex meshes arising in modeling, simu...
Le-Jeng Shiue, Vineet Goel, Jörg Peters
ICCS
2009
Springer
15 years 11 months ago
Evaluating Algorithms for Shared File Pointer Operations in MPI I/O
MPI-I/O is a part of the MPI-2 specification defining file I/O operations for parallel MPI applications. Compared to regular POSIX style I/O functions, MPI I/O offers features ...
Ketan Kulkarni, Edgar Gabriel
CATA
2004
15 years 8 months ago
The Instruction Execution Mechanism for Responsive Multithreaded Processor
This paper describes the instruction execution mechanism of Responsive Multithreaded (RMT) Processor for distributed real-time processing. The execution order of each thread is co...
Tstomu Itou, Nobuyuki Yamasaki