In this paper, we present performance results from mapping five real-world DSP applications on an embedded system-on-chip that incorporates coarse-grain reconfigurable logic with ...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
This paper presents a compiler methodology for memoryaware mapping on 2-Dimensional coarse-grained reconfigurable architectures that aims in improving the mapped applications’ p...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...
The deployment of biomedical applications in a grid environment has started about three years ago in several European projects and national initiatives. These applications have dem...
Vincent Breton, Christophe Blanchet, Yannick Legr&...
Developers and users of high-performance distributed systems often observe performance problems such as unexpectedly low throughput or high latency. Determining the source of the ...
Dan Gunter, Brian Tierney, Keith R. Jackson, Jason...
The development of communications services for distributed applications that are both well-structured (layered) and efficient can be difficult. This paper presents a C++ framework...