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MASCOTS
2010
15 years 8 months ago
Efficient Discovery of Loop Nests in Execution Traces
Execution and communication traces are central to performance modeling and analysis. Since the traces can be very long, meaningful compression and extraction of representative beha...
Qiang Xu, Jaspal Subhlok, Nathaniel Hammen
GLOBECOM
2008
IEEE
16 years 1 months ago
Joint Channel and Mismatch Correction for OFDM Reception with Time-interleaved ADCs: Towards Mostly Digital MultiGigabit Transce
— Time-interleaved (TI) analog-to-digital converters (ADCs) are a promising architecture for realizing the highspeed ADCs required to implement “mostly digital” receivers for...
P. Sandeep, Upamanyu Madhow, Munkyo Seo, Mark J. W...
LEGE
2003
94views Education» more  LEGE 2003»
15 years 8 months ago
Dynamic Learning Agents and Enhanced Presence on the Grid
Human Learning on the Grid will be based on the synergies between advanced software and Human agents. These synergies will be possible to the extent that conversational protocols ...
Stefano A. Cerri, Marc Eisenstadt, Clement Jonquet
ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
16 years 3 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
CANPC
1999
Springer
15 years 11 months ago
Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...
David Brooks, Margaret Martonosi