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IPPS
2006
IEEE
16 years 20 days ago
Parallel FPGA-based all-pairs shortest-paths in a directed graph
With rapid advances in VLSI technology, Field Programmable Gate Arrays (FPGAs) are receiving the attention of the Parallel and High Performance Computing community. In this paper,...
Uday Bondhugula, Ananth Devulapalli, Joseph Fernan...
183
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LCPC
1993
Springer
15 years 10 months ago
Maximizing Loop Parallelism and Improving Data Locality via Loop Fusion and Distribution
Abstract. Loop fusion is a program transformation that merges multiple loops into one. It is e ective for reducing the synchronization overhead of parallel loops and for improving ...
Ken Kennedy, Kathryn S. McKinley
SPAA
1992
ACM
15 years 10 months ago
Subset Barrier Synchronization on a Private-Memory Parallel System
A global barrier synchronizes all processors in a parallel system. This paper investigates algorithms that allow disjoint subsets of processors to synchronize independently and in...
Anja Feldmann, Thomas R. Gross, David R. O'Hallaro...
PPOPP
1991
ACM
15 years 10 months ago
Coarse-Grain Parallel Programming in Jade
This paper presents Jade, a language which allows a programmer to easily express dynamic coarse-grain parallelism. Starting with a sequential program, a programmer augments those ...
Monica S. Lam, Martin C. Rinard
TCS
2010
15 years 5 months ago
Computing the graph-based parallel complexity of gene assembly
We consider a graph-theoretical formalization of the process of gene assembly in ciliates introduced in Ehrenfeucht et al (2003), where a gene is modeled as a signed graph. The ge...
Artiom Alhazov, Chang Li, Ion Petre