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» ParalleX: A Study of A New Parallel Computation Model
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184
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IPPS
2002
IEEE
15 years 11 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
172
Voted
GRAPHITE
2004
ACM
16 years 2 days ago
Smooth constraints for spline variational modeling
This article introduces a new class of constraints for spline variational modeling, which allows more flexible user specification, as a constrained point can ”slide” along a...
Julien Lenoir, Laurent Grisoni, Philippe Meseure, ...
PPOPP
2009
ACM
16 years 7 months ago
Atomic quake: using transactional memory in an interactive multiplayer game server
Transactional Memory (TM) is being studied widely as a new technique for synchronizing concurrent accesses to shared memory data structures for use in multi-core systems. Much of ...
Adrián Cristal, Eduard Ayguadé, Fera...
IPPS
2002
IEEE
15 years 11 months ago
Hierarchical Interconnects for On-Chip Clustering
In the sub-micron technology era, wire delays are becoming much more important than gate delays, making it particularly attractive to go for clustered designs. A common form of cl...
Aneesh Aggarwal, Manoj Franklin
BMCBI
2007
203views more  BMCBI 2007»
15 years 6 months ago
A Grid-based solution for management and analysis of microarrays in distributed experiments
Several systems have been presented in the last years in order to manage the complexity of large microarray experiments. Although good results have been achieved, most systems ten...
Ivan Porro, Livia Torterolo, Luca Corradi, Marco F...