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GLVLSI
2007
IEEE
141views VLSI» more  GLVLSI 2007»
15 years 10 months ago
A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops
he abstract and simple computation and communication mechanism in the synchronous computational model it is easy to simulate synchronous systems and to apply formal verification m...
Tarvo Raudvere, Ingo Sander, Axel Jantsch
HIPC
2007
Springer
15 years 10 months ago
Accomplishing Approximate FCFS Fairness Without Queues
First Come First Served (FCFS) is a policy that is accepted for implementing fairness in a number of application domains such as scheduling in Operating Systems, scheduling web req...
K. Subramani, Kamesh Madduri
FMCAD
2009
Springer
15 years 10 months ago
Industrial strength refinement checking
This paper discusses a methodology used on an industrial hardware development project to validate various cache-coherence protocol components. The idea is to use a high level model...
Jesse D. Bingham, John Erickson, Gaurav Singh, Fle...
ANSS
2004
IEEE
15 years 10 months ago
Cache Simulation Based on Runtime Instrumentation for OpenMP Applications
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
Jie Tao, Josef Weidendorfer
ANCS
2006
ACM
15 years 10 months ago
Packet pre-filtering for network intrusion detection
As Intrusion Detection Systems (IDS) utilize more complex syntax to efficiently describe complex attacks, their processing requirements increase rapidly. Hardware and, even more, ...
Ioannis Sourdis, Vassilis Dimopoulos, Dionisios N....