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MICRO
2003
IEEE
161views Hardware» more  MICRO 2003»
16 years 2 days ago
Design and Implementation of High-Performance Memory Systems for Future Packet Buffers
In this paper we address the design of a future high-speed router that supports line rates as high as OC-3072 (160 Gb/s), around one hundred ports and several service classes. Bui...
Jorge García-Vidal, Jesús Corbal, Ll...
ICS
2003
Tsinghua U.
16 years 21 hour ago
Inferential queueing and speculative push for reducing critical communication latencies
Communication latencies within critical sections constitute a major bottleneck in some classes of emerging parallel workloads. In this paper, we argue for the use of Inferentially...
Ravi Rajwar, Alain Kägi, James R. Goodman
ECCV
2010
Springer
15 years 12 months ago
Fast Covariance Computation and Dimensionality Reduction for Sub-Window Features in Images
This paper presents algorithms for efficiently computing the covariance matrix for features that form sub-windows in a large multidimensional image. For example, several image proc...
ICS
2010
Tsinghua U.
15 years 11 months ago
Handling task dependencies under strided and aliased references
The emergence of multicore processors has increased the need for simple parallel programming models usable by nonexperts. The ability to specify subparts of a bigger data structur...
Josep M. Pérez, Rosa M. Badia, Jesús...
MM
2009
ACM
198views Multimedia» more  MM 2009»
15 years 11 months ago
Scalable detection of partial near-duplicate videos by visual-temporal consistency
Following the exponential growth of social media, there now exist huge repositories of videos online. Among the huge volumes of videos, there exist large numbers of near-duplicate...
Hung-Khoon Tan, Chong-Wah Ngo, Richang Hong, Tat-S...