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CEC
2007
IEEE
15 years 8 months ago
Fitness inheritance in evolutionary and multi-objective high-level synthesis
Abstract—The high-level synthesis process allows the automatic design and implementation of digital circuits starting from a behavioral description. Evolutionary algorithms are v...
Christian Pilato, Gianluca Palermo, Antonino Tumeo...
FMSD
2006
183views more  FMSD 2006»
15 years 6 months ago
An algebraic theory for behavioral modeling and protocol synthesis in system design
The design productivity gap has been recognized by the semiconductor industry as one of the major threats to the continued growth of system-on-chips and embedded systems. Ad-hoc sy...
Jean-Pierre Talpin, Paul Le Guernic
TOG
2008
107views more  TOG 2008»
15 years 6 months ago
Multiscale texture synthesis
Example-based texture synthesis algorithms have gained widespread popularity for their ability to take a single input image and create a perceptually similar non-periodic texture....
Charles Han, Eric Risser, Ravi Ramamoorthi, Eitan ...
ICCAD
2010
IEEE
158views Hardware» more  ICCAD 2010»
15 years 4 months ago
Novel binary linear programming for high performance clock mesh synthesis
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
Minsik Cho, David Z. Pan, Ruchir Puri
TCAD
2011
15 years 22 days ago
High-Level Synthesis for FPGAs: From Prototyping to Deployment
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo ...