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DAC
1996
ACM
15 years 10 months ago
Post-Layout Optimization for Deep Submicron Design
To reduce the number of synthesis and layout iterations, we present a new delay optimization technique, which inserts buers based on back-annotated detailed routing information. D...
Koichi Sato, Masamichi Kawarabayashi, Hideyuki Emu...
ICIP
1999
IEEE
16 years 7 months ago
Rate-Distortion-Efficient Video Compression Using a 3-D Head Model
In this paper we combine model-based video synthesis with block-based motion-compensated prediction (MCP). Two frames are utilized far prediction where one frame is the previous d...
Peter Eisert, Thomas Wiegand, Bernd Girod
EURODAC
1994
IEEE
139views VHDL» more  EURODAC 1994»
15 years 10 months ago
OSCAR: optimum simultaneous scheduling, allocation and resource binding based on integer programming
: This paper presents an approach to high-level synthesis which is based upon a 0/1 integer programming model. In contrast to other approaches, this model allows solving all three ...
Birger Landwehr, Peter Marwedel, Rainer Dömer
CODES
1999
IEEE
15 years 10 months ago
Scheduling with optimized communication for time-triggered embedded systems
We present an approach to process scheduling for synthesis of safety-critical distributed embedded systems. Our system model captures both the flow of data and that of control. Th...
Paul Pop, Petru Eles, Zebo Peng
ASPDAC
2009
ACM
152views Hardware» more  ASPDAC 2009»
16 years 20 days ago
A novel Toffoli network synthesis algorithm for reversible logic
—Reversible logic studies have promising potential on energy lossless circuit design, quantum computation, nanotechnology, etc. Reversible logic features a one-to-one input outpu...
Yexin Zheng, Chao Huang