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ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
15 years 10 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
105
Voted
DAC
2005
ACM
16 years 7 months ago
Leakage power optimization with dual-Vth library in high-level synthesis
Xiaoyong Tang, Hai Zhou, Prithviraj Banerjee
ICCAD
1994
IEEE
92views Hardware» more  ICCAD 1994»
15 years 10 months ago
Synthesis of manufacturable analog circuits
? We describe a synthesis system that takes operating range constraints and inter- and intra- circuit parametric manufacturing variations into account while designing a sized and b...
Tamal Mukherjee, L. Richard Carley, Rob A. Rutenba...
DATE
2004
IEEE
128views Hardware» more  DATE 2004»
15 years 9 months ago
Synthesis for Manufacturability: A Sanity Check
As we move towards nanometer technology, manufacturing problems become overwhelmingly difficult to solve. Presently, optimization for manufacturability is performed at a post-synt...
Alessandra Nardi, Alberto L. Sangiovanni-Vincentel...
ICCAD
1993
IEEE
134views Hardware» more  ICCAD 1993»
15 years 10 months ago
Beyond the combinatorial limit in depth minimization for LUT-based FPGA designs
In this paper, we present an integrated approach to synthesis and mapping to go beyond the combinatorial limit set up by the depth-optimal FlowMap algorithm. The new algorithm, na...
Jason Cong, Yuzheng Ding