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ASAP
2005
IEEE
142views Hardware» more  ASAP 2005»
15 years 11 months ago
Decimal Floating-Point Square Root Using Newton-Raphson Iteration
With continued reductions in feature size, additional functionality may be added to future microprocessors to boost the performance of important application domains. Due to growth...
Liang-Kai Wang, Michael J. Schulte
CODES
2005
IEEE
15 years 11 months ago
Key research problems in NoC design: a holistic perspective
Networks-on-Chip (NoCs) have been recently proposed as a promising solution to complex on-chip communication problems. The lack of an unified representation of applications and ar...
Ümit Y. Ogras, Jingcao Hu, Radu Marculescu
ISQED
2005
IEEE
120views Hardware» more  ISQED 2005»
15 years 11 months ago
Passive Hierarchical Model Order Reduction and Realization of RLCM Circuits
This paper presents a novel compact passive modeling technique for high-performance RF passives and interconnects modeled as high-order RLCM circuits. The new method is based on a...
Pu Liu, Zhenyu Qi, Sheldon X.-D. Tan
COCOON
2005
Springer
15 years 11 months ago
Genome Rearrangements with Partially Ordered Chromosomes
Genomic maps often do not specify the order within some groups of two or more markers. The synthesis of a master map from several sources introduces additional order ambiguity due ...
Chunfang Zheng, David Sankoff
144
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GECCO
2005
Springer
196views Optimization» more  GECCO 2005»
15 years 11 months ago
Providing information from the environment for growing electronic circuits through polymorphic gates
This paper deals with the evolutionary design of programs (constructors) that are able to create (n+2)-input circuits from n-input circuits. The growing circuits are composed of p...
Michal Bidlo, Lukás Sekanina