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» Optimizing pipelines for power and performance
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TVLSI
2008
120views more  TVLSI 2008»
15 years 6 months ago
An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
Dongwan Shin, Andreas Gerstlauer, Rainer Döme...
CCR
2004
153views more  CCR 2004»
15 years 6 months ago
Tree bitmap: hardware/software IP lookups with incremental updates
IP address lookup is challenging for high performance routers because it requires a longest matching prefix at speeds of up to 10 Gbps (OC-192). Existing solutions have poor updat...
Will Eatherton, George Varghese, Zubin Dittia
TIP
2010
111views more  TIP 2010»
15 years 1 months ago
Demosaicking by Alternating Projections: Theory and Fast One-Step Implementation
Color image demosaicking is a key process in the digital imaging pipeline. In this paper, we study a classical demosaicking algorithm based on alternating projections (AP), propos...
Yue M. Lu, Mina Karzand, Martin Vetterli
GECCO
2010
Springer
197views Optimization» more  GECCO 2010»
15 years 11 months ago
Adaptive strategy selection in differential evolution
Differential evolution (DE) is a simple yet powerful evolutionary algorithm for global numerical optimization. Different strategies have been proposed for the offspring generation...
Wenyin Gong, Álvaro Fialho, Zhihua Cai
IEEEPACT
2006
IEEE
16 years 15 days ago
Compiling for stream processing
This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...
Abhishek Das, William J. Dally, Peter R. Mattson