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» Optimizing pipelines for power and performance
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ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
15 years 4 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen
DAC
2006
ACM
16 years 7 months ago
Optimality study of resource binding with multi-Vdds
Deploying multiple supply voltages (multi-Vdds) on one chip is an important technique to reduce dynamic power consumption. In this work we present an optimality study for resource...
Deming Chen, Jason Cong, Yiping Fan, Junjuan Xu
DLS
2010
204views Languages» more  DLS 2010»
15 years 4 months ago
Alias analysis for optimization of dynamic languages
Dynamic languages such as Python allow programs to be written more easily using high-level constructs such as comprehensions for queries and using generic code. Efficient executio...
Michael Gorbovitski, Yanhong A. Liu, Scott D. Stol...
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
16 years 18 days ago
Integrated placement and skew optimization for rotary clocking
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C....
MOBICOM
2003
ACM
15 years 11 months ago
MiSer: an optimal low-energy transmission strategy for IEEE 802.11a/h
Reducing the energy consumption by wireless communication devices is perhaps the most important issue in the widely-deployed and exponentially-growing IEEE 802.11 Wireless LANs (W...
Daji Qiao, Sunghyun Choi, Amit Jain, Kang G. Shin