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» Optimizing pipelines for power and performance
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EMSOFT
2007
Springer
16 years 21 days ago
Block recycling schemes and their cost-based optimization in nand flash memory based storage system
Flash memory has many merits such as light weight, shock resistance, and low power consumption, but also has limitations like the erase-before-write property. To overcome such lim...
Jongmin Lee, Sunghoon Kim, Hunki Kwon, Choulseung ...
ISCA
1995
IEEE
110views Hardware» more  ISCA 1995»
15 years 10 months ago
Optimization of Instruction Fetch Mechanisms for High Issue Rates
Recent superscalar processors issue four instructions per cycle. These processors are also powered by highly-parallel superscalar cores. The potential performance can only be expl...
Thomas M. Conte, Kishore N. Menezes, Patrick M. Mi...
ARITH
2009
IEEE
16 years 1 months ago
Datapath Synthesis for Standard-Cell Design
Datapath synthesis for standard-cell design goes through extraction of arithmetic operations from RTL code, high-level arithmetic optimizations and netlist generation. Numerous ar...
Reto Zimmermann
SECON
2008
IEEE
16 years 28 days ago
Adaptive Radio Modes in Sensor Networks: How Deep to Sleep?
—Energy-efficient performance is a central challenge in sensor network deployments, and the radio is a major contributor to overall energy node consumption. Current energyeffic...
Raja Jurdak, Antonio G. Ruzzelli, Gregory M. P. O'...
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
16 years 3 months ago
Robust system level design with analog platforms
An approach to robust system level mixed signal design is presented based on analog platforms. The bottom-up characterization phase of platform components provides accurate perfor...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...