2048 search results - page 199 / 410 » Optimizing pipelines for power and performance |
154
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FPGA
2009
ACM
16 years 1 months ago
2009
ACM
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
167
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IPPS
2000
IEEE
15 years 11 months ago
2000
IEEE
As the speed gap between CPU and memory widens, memory hierarchy has become the primary factor limiting program performance. Until now, the principal focus of hardware and softwar...
154
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MICRO
1999
IEEE
15 years 10 months ago
1999
IEEE
Branch mispredictions can have a major performance impact on high-performance processors. Multipath execution has recently been introduced to help limit the misprediction penaltie...
196
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DAC
2004
ACM
15 years 10 months ago
2004
ACM
In an attempt to enable the cost-effective production of lowand mid-volume application-specific chips, researchers have proposed a number of so-called structured ASIC architecture...
304
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Publication
Computer vision techniques have been applied for rapid
and accurate structure recovery in many fields. Most methods
perform poorly in areas containing little or no texture
and i...