2048 search results - page 133 / 410 » Optimizing pipelines for power and performance |
132
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DATE
2007
IEEE
16 years 24 days ago
2007
IEEE
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
140
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ISPD
1999
ACM
15 years 10 months ago
1999
ACM
This paper presents a methodology to analyze signal integrity such as power voltage drop and clock skew in early stages of design, more specifically, when RTL-design and early flo...
187
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ICASSP
2010
IEEE
15 years 6 months ago
2010
IEEE
The resource allocation problem in wireless multi-user decode-and-forward (DF) relay networks is considered. The conventional resource allocation schemes based on the equal distri...
193
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ESTIMEDIA
2005
Springer
15 years 12 months ago
2005
Springer
Designing Application-Specific Instruction-set Processors (ASIPs) usually requires designing a custom datapath, and modifying instruction-set, instruction decoder, and compiler. A...
149
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CVPR
2009
IEEE
15 years 10 months ago
2009
IEEE
Boosted by the Middlebury challenge, the precision of dense multi-view stereovision methods has increased drastically in the past few years. Yet, most methods, although they perfo...