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ISLPED
2010
ACM
170views Hardware» more  ISLPED 2010»
15 years 6 months ago
Low-power sub-threshold design of secure physical unclonable functions
The unique and unpredictable nature of silicon enables the use of physical unclonable functions (PUFs) for chip identification and authentication. Since the function of PUFs depen...
Lang Lin, Daniel E. Holcomb, Dilip Kumar Krishnapp...
ISCA
2006
IEEE
130views Hardware» more  ISCA 2006»
15 years 6 months ago
Area-Performance Trade-offs in Tiled Dataflow Architectures
: Tiled architectures, such as RAW, SmartMemories, TRIPS, and WaveScalar, promise to address several issues facing conventional processors, including complexity, wire-delay, and pe...
Steven Swanson, Andrew Putnam, Martha Mercaldi, Ke...
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 4 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
CORR
2012
Springer
225views Education» more  CORR 2012»
14 years 2 months ago
The Filter-Placement Problem and its Application to Minimizing Information Multiplicity
In many information networks, data items – such as updates in social networks, news flowing through interconnected RSS feeds and blogs, measurements in sensor networks, route u...
Dóra Erdös, Vatche Ishakian, Andrei La...
HPCC
2011
Springer
14 years 5 months ago
Achieving Performance and Availability Guarantees with Spot Instances
Abstract—In the Infrastructure-as-a-Service (IaaS) cloud computing market, spot instances refer to virtual servers that are rented via an auction. Spot instances allow IaaS provi...
Michele Mazzucco, Marlon Dumas