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» Optimizing for parallelism and data locality
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ICS
1999
Tsinghua U.
15 years 11 months ago
Reducing cache misses using hardware and software page placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Timothy Sherwood, Brad Calder, Joel S. Emer
ASPLOS
2004
ACM
16 years 2 days ago
Programming with transactional coherence and consistency (TCC)
Transactional Coherence and Consistency (TCC) offers a way to simplify parallel programming by executing all code within transactions. In TCC systems, transactions serve as the fu...
Lance Hammond, Brian D. Carlstrom, Vicky Wong, Ben...
124
Voted
HICSS
1997
IEEE
110views Biometrics» more  HICSS 1997»
15 years 11 months ago
Resource Management in the mpC Programming Environment
The mpC language was developed to write efJicientand portable programsfor wide range of distributed memory machines. It supports both task and data parallelism, allows both static...
Dmitry Arapov, Alexey Kalinov, Alexey L. Lastovets...
ASAP
2008
IEEE
161views Hardware» more  ASAP 2008»
15 years 8 months ago
Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...
Yang Sun, Yuming Zhu, Manish Goel, Joseph R. Caval...
191
Voted
CORR
2008
Springer
116views Education» more  CORR 2008»
15 years 6 months ago
Learning to rank with combinatorial Hodge theory
Abstract. We propose a number of techniques for learning a global ranking from data that may be incomplete and imbalanced -- characteristics that are almost universal to modern dat...
Xiaoye Jiang, Lek-Heng Lim, Yuan Yao, Yinyu Ye